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ltc6421-20 1 642120fb typical application features applications description dual matched 1.3ghz differential ampli ers/adc drivers the ltc ? 6421-20 is a dual high speed differential ampli? er targeted at processing signals from dc to 140mhz. the part has been speci? cally designed to drive 12-, 14- and 16-bit adcs with low noise and low distortion, but can also be used as a general-purpose broadband gain block. the ltc6421-20 is easy to use, with minimal support circuitry required. the output common mode voltage is set using an external pin, independent of the inputs, which eliminates the need for transformers or ac-coupling capacitors in many applications. the gain is internally ? xed at 20db (10v/ v). the ltc6421-20 saves space and power compared to alternative solutions using if gain blocks and transformers. the ltc6421-20 is packaged in a compact 20-lead 3mm 4mm qfn package and operates over the C 40c to 85c temperature range. distribution of gain match n matched gain 0.1db n matched phase 0.2 at 100mhz n channel separation 80db at 100mhz n 1.3ghz C3db bandwidth; fixed gain of 10v/v (20db) n imd 3 = C76dbc at 100mhz, 2v p-p n equivalent oip 3 = 42dbm at 100mhz n 1nv/ hz internal op amp noise n 6.2db noise figure n differential inputs and outputs n rail-to-rail output swing n 40ma supply current (120mw) per ampli? er n 1v to 1.6v output common mode voltage, adjustable n dc- or ac-coupled operation n 20-lead 3mm 4mm 0.75mm qfn package n differential adc driver n single ended to differential conversion n if sampling (diversity) receivers n broadband i/q ampli? ers n satellite communications matched dual ampli? ers with output common mode biasing 642120 ta01a 3v v + a enablea ltc6421-20 z in = 200 0.1f Cina 100 1000 1000 +ina v C v C +outa v ocma v ocma 0.1db gain matching 0.1 phase matching at 100mhz C outa z in = 200 v ocma v ocma v + b 3v enableb v ocmb v ocmb 1000pf 0.1f v ina 100 12.5 12.5 0.1f +inb 100 1000 1000 Cinb C outb +outb 0.1f v inb 100 12.5 12.5 0.1f 0.1f 1000pf v ocmb v ocmb channel-to-channel gain match (db) C 0.25 percentage of units 40 35 30 25 20 15 10 5 0 0.15 642120 ta01b C 0.15 C 0.05 0.05 0.25 l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners.
ltc6421-20 2 642120fb absolute maximum ratings supply voltage (v + ? v ? ) .........................................3.6v input current (note 2) ..........................................10ma operating temperature range (note 3)....? 40c to 85c speci? ed temperature range (note 4) ....? 40c to 85c storage temperature range ...................? 65c to 150c maximum junction temperature........................... 150c output short-circuit duration .......................... inde? nite (note 1) 20 19 18 17 7 8 top view 21 v ? udc package 20-lead (3mm 4mm) plastic qfn 9 10 6 5 4 3 2 1 11 12 13 14 15 16 +ina ? ina v ? v ? ? inb +inb ? outa v + a v ? v ? v + b ? outb v + a v ocma enablea +outa v + b v ocmb enableb +outb t jmax = 150c,
ltc6421-20 3 642120fb dc electrical characteristics symbol parameter conditions min typ max units input/output characteristic g diff gain v in = 100mv differential l 19.6 20 20.4 db g gain matching channel-to-channel l 0.1 0.25 db tc gain gain temperature drift v in = 100mv differential l 0.0015 db/c v swingmin output swing low (v ocm = 1.5v) each output, v in = 400mv differential l 0.1 0.25 v v swingmax output swing high (v ocm = 1.5v) each output, v in = 400mv differential l 2.75 2.9 v v outdiffmax maximum differential output swing l 5 5.6 v p-p i out output current drive 2v p-p, out (note 10) l 10 ma v os input offset voltage differential l C2 0.4 2 mv tcv os input offset voltage drift differential l 1.4 v/c i vrmin input common mode voltage range, min l 1v i vrmax input common mode voltage range, max l 1.6 v r indiff input resistance (+in, C in) differential l 170 200 230 1 r in input impedance matching channel-to-channel l 1 2.5 % c indiff input capacitance (+in, C in) differential, includes parasitic 1 pf r outdiff output resistance (+out, C out) differential l 20 25 36 1 cmrr common mode rejection ratio input common mode voltage 1v to 1.6v l 45 68 db output common mode voltage control g cm common mode gain v ocm = 1v to 1.6v 1 v/ v v ocmmin output common mode range, min l 1v v ocmmax output common mode range, max l 1.6 v v oscm common mode offset voltage v ocm = 1.25v to 1.5v l C10 2 10 mv tcv oscm common mode offset voltage drift l 6 v/c iv ocm v ocm input current l C15 C3 0 a enable x pins (x = a, b) v il enablex input low voltage l 0.8 v v ih enablex input high voltage l 2.4 v enablex input current enablex ) 0.8v enablex * 2.4v l l 1.5 0.5 3 a a power supply v s operating supply range l 2.85 3 3.5 v i s supply current enablex 0.8v; per ampli? er l 40 50 ma i shdn shutdown supply current enablex 2.4v; per ampli? er, inputs floating l 13 ma psrr power supply rejection ratio (differential outputs) v + = 2.85v to 3.5v l 55 86 db the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v + = 3v, v C = 0v, +in = Cin = v ocm = 1.25v, enable = 0v, no r l unless otherwise noted.
ltc6421-20 4 642120fb ac electrical characteristics symbol parameter conditions min typ max units g gain matching f = 100mhz (note 9) l 0.1 0.25 db p phase matching f = 100mhz 0.2 deg channel separation (note 8) f = 100mhz 80 db C3dbbw C3db bandwidth 200mv p-p, out (note 6) 1.3 ghz 0.5dbbw bandwidth for 0.5db flatness 200mv p-p, out (note 6) 250 mhz 0.1dbbw bandwidth for 0.1db flatness 200mv p-p, out (note 6) 130 mhz nf noise figure r l = 375 1 (note 5), f = 100mhz 6.2 db e in input referred voltage noise density includes resistors (short inputs), f = 100mhz 2.2 nv/ hz e on output referred voltage noise density includes resistors (short inputs), f = 100mhz 22 nv/ hz 1/f 1/f noise corner 12.5 khz sr slew rate differential (note 6) 4500 v/s t s1% 1% settling time 2v p-p, out (note 6) 2 ns t ovdr overdrive recovery time 1.9v p-p, out (note 6) single ended 7 ns p 1db 1db compression point r l = 375 1 (notes 5, 7), f = 100mhz 18 dbm t on turn-on time +out, Cout within 10% of final values 80 ns t off turn-off time i cc falls to 10% of nominal 150 ns C3dbbw vocm v ocm pin small signal C3db bw 0.1v p-p at v ocm , measured single-ended at output (note 6) 15 mhz imd 3 3rd order intermodulation distortion f = 100mhz (1mhz spacing), v out = 2v p-p composite C76 dbc oip 3 3rd order output intercept f = 100mhz (note 7) 42 dbc iip 3 3rd order input intercept f = 100mhz (z in = 50) f = 100mhz (z in = 200) 22 16 dbc dbc hd 2 2nd order harmonic distortion f = 100mhz, v out = 2v p-p C74 dbc hd 3 3rd order harmonic distortion f = 100mhz, v out = 2v p-p C78 dbc note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: input pins (+in, Cin) are protected by steering diodes to either supply. if the inputs go beyond either supply rail, the input current should be limited to less than 10ma. note 3: the ltc6421c and ltc6421i are guaranteed functional over the operating temperature range of C 40c to 85c. note 4: the ltc6421c is guaranteed to meet speci? ed performance from 0c to 70c. it is designed, characterized and expected to meet speci? ed performance from C 40c to 85c but is not tested or qa sampled at these temperatures. the ltc6421i is guaranteed to meet speci? ed performance from C 40c to 85c. note 5: input and output baluns used. see test circuit a. note 6: measured using test circuit b. r l = 87.5 on each output. note 7: since the ltc6421-20 is a feedback ampli? er with low output impedance, a resistive load is not required when driving an ad converter. therefore, typical output power is very small. in order to compare the ltc6421-20 with ampli? ers that require 50 1 output load, the output voltage swing driving a given r l is converted to oip 3 and p 1db as if it were driving a 50 1 load. using this modi? ed convention, 2v p-p is by de? nition equal to 10dbm, regardless of actual r l . note 8: channel separation (the inverse of crosstalk) is measured by driving a signal into one input, while terminating the other input. channel separation is the ratio of the resulting output signal at the driven channel to the channel that is not driven. note 9: not production tested. guaranteed by design and by correlation to production tested parameters. note 10: the output swing range is at least 2v p-p differential even when sourcing or sinking 20ma. tested at v ocm = 1.5v. the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v + = 3v, v C = 0v, v ocm = 1.25v, enable = 0v, no r l unless otherwise noted.
ltc6421-20 5 642120fb input and output impedance vs frequency noise figure and input referred noise voltage vs frequency small-signal transient response typical performance characteristics frequency response channel-to-channel gain match vs frequency input and output re? ection and reverse isolation vs frequency frequency (mhz) 10 C0.1 gain match (db) 0 0.1 0.2 0.3 100 1000 2000 642120 g01 C 0.2 C 0.3 C 0.4 C 0.5 0.4 0.5 frequency (mhz) 10 C 0.1 group delay match (ns) 0 0.1 0.2 0.3 100 1000 2000 642120 g02 C 0.2 C 0.3 C 0.4 C 0.5 0.4 0.5 frequency (mhz) 10 C1.0 phase match (deg) C 0.5 0 1.0 100 500 642120 g03 0.5 channel-to-channel group delay match vs frequency channel-to-channel phase match vs frequency frequency (mhz) 10 100 1000 3000 gain (db) 25 20 15 10 5 0 642120 g04 test circuit b s21 phase and group delay vs frequency frequency (mhz) 0 phase (degree) 100 0 C100 C200 C300 C 400 group delay (ns) 1.5 1.2 0.9 0.6 0.3 0 200 400 600 800 1000 642120 g05 phase test circuit b group delay frequency (mhz) 10 s parameters (db) 0 C10 C20 C30 C40 C50 C60 C70 C80 100 1000 3000 642120 g06 s11 s22 s12 test circuit b frequency (mhz) 1 impedance magnitude () 250 200 150 100 50 0 225 175 125 75 25 impedance phase (degree) 100 80 60 40 20 C80 C60 C40 C20 0 C100 10 100 1000 642120 g07 z in z out z in z out phase impedance magnitude frequency (mhz) 10 noise figure (db) 15 10 2 4 12 14 6 8 0 11 3 5 13 7 9 1 input referred noise voltage (nv/hz) 6 4 2 0 100 1000 642120 g08 noise figure e in time (ns) 0 output voltage (v) 1.35 1.20 1.25 1.30 1.15 51015 20 642120 g09 C out +out r l = 87.5 per output
ltc6421-20 6 642120fb harmonic distortion vs frequency typical performance characteristics third order intermodulation distortion vs frequency equivalent output third order intercept vs frequency channel separation vs frequency overdrive transient response time (ns) 0 output voltage (v) 2.5 0.5 1.0 2.0 1.5 0 50 100 150 200 642120 g10 C out +out r l = 87.5 per output 0 50 100 150 200 C40 C50 C60 C80 C90 C70 C120 C110 C100 frequency (mhz) third order imd (dbc) 642120 g12 differential input v out = 2v p-p composite driving ltc2235 0 50 100 150 200 frequency (mhz) 642120 g13 output ip3 (dbm) 70 60 50 40 20 10 30 0 differential input v out = 2v p-p composite (note 7) driving ltc2285 frequency (mhz) 1 40 channel separation (db) 60 80 10 100 1000 642120 g14 20 40 120 100 (note 8) frequency (mhz) 0 C100 harmonic distrotion (dbc) C90 C80 C70 C60 C50 C40 50 100 150 200 hd2 hd3 642120 g11 differential input v out = 2v p-p driving ltc2285
ltc6421-20 7 642120fb pin functions +ina, Cina, Cinb, +inb (pins 1, 2, 5, 6): differential inputs of a and b channel respectively. v C (pins 3, 4, 13, 14, 21): negative power supply. all four pins, as well as the exposed back, must be connected to same voltage/ground. enablea , enableb (pins 9, 18): logic inputs. if low, the ampli? er is enabled. if high, the ampli? er is disabled and placed in a low-power shutdown mode, making the ampli? er outputs high impedance. these pins are internally separate. these pins should not be left ? oating. v + a , v + b (pins 15, 20, 7, 12 ): positive power supply (normally tied to 3v or 3.3v). supply pins of a and b channels are internally separate. bypass each pin with 1000pf and 0.1f capacitors as close to the pins as possible. C outa, + outa, C outb, + outb (pins 16, 17, 11, 10): differential outputs of channels a and b respectively. v ocma , v ocmb (pins 19, 8): these pins set the output common mode voltage for the respective channel. they are internally separate. a 0.1f external bypass capacitor is recommended. exposed pad (pin 21): v C . the exposed pad must be connected to same voltage/ground as pins 3, 4, 13, 14. block diagram 642120 bd 7 v + b v + b v + a Couta Coutb 8 v ocmb v ocma +ina Cina v C v C r out 12.5 r out 12.5 r f 1000 r g 100 r f 1000 r f 1000 r f 1000 10 v C v C 9 20 v + a +outb +outa 19 17 18 enablea enableb r out 12.5 r out 12.5 r g 100 r g 100 r g 100 1 2 3 4 5 6 16 15 14 13 12 11 Cinb +inb C C + + + C C +
ltc6421-20 8 642120fb circuit operation each of the two channels of the ltc6421-20 is composed of a fully differential ampli? er with on chip feedback and output common mode voltage control circuitry. differential gain and input impedance are set by 100 1 /1000 1 resistors in the feedback network. small output resistors of 12.5 1 improve the circuit stability over various load conditions. the ltc6421-20 is very ? exible in terms of i/o coupling. it can be ac- or dc-coupled at the inputs, the outputs or both. if the inputs are ac-coupled, the input common mode voltage is automatically biased close to v ocm and thus no external circuitry is needed for bias. the ltc6421-20 provides an output common mode voltage set by v ocm , which allows driving an adc directly without external components such as a transformer or ac coupling capacitors. the input signal can be either single-ended or differential with only minor differences in distortion performance. figure 1. input termination for differential 50 1 input impedance using shunt resistor figure 2. input termination for differential 50 1 input impedance using a 1:4 balun applications information 642120 f01 +in in + out C in C out + Cin 100 66.5 1000 1/2 ltc6421-20 100 25 25 v in 1000 + C 642120 f02 +in in + out C in C out + Cin 100 1000 1/2 ltc6421-20 100 25 tcm4-19 25 v in 1000 + C 1:4 ? ? input impedance and matching the differential input impedance of the ltc6421-20 is 200 1 . if a 200 1 source impedance is unavailable, then the differential inputs may need to be terminated to a lower value impedance, e.g. 50 1 , in order to provide an impedance match for the source. several choices are available. one approach is to use a differential shunt resistor (figure 1). another approach is to employ a wide band transformer (figure 2). both methods provide a wide band impedance match. the termination resistor or the transformer must be placed close to the input pins in order to minimize the re? ection due to input mismatch. alternatively, one could apply a narrowband impedance match at the inputs of the ltc6421-20 for frequency selection and/or noise reduction.
ltc6421-20 9 642120fb applications information referring to figure 3, ltc6421-20 can be easily con? gured for single-ended input and differential output without a balun. the signal is fed to one of the inputs through a matching network while the other input is connected to the same matching network and a source resistor. because the return ratios of the two feedback paths are equal, the two outputs have the same gain and thus symmetrical swing. in general, the single-ended input impedance and termination resistor r t are determined by the combination of r s , r g and r f . for example, when r s is 50 1 , it is found that the single-ended input impedance is 202 1 and r t is 66.5 1 in order to match to a 50 1 source impedance. the ltc6421-20 is unconditionally stable. however, the overall differential gain is affected by both source impedance and load impedance as follows: a v = v out v in = 2000 r s + 200 ? r l 25 + r l figure 3. input termination for single-ended 50 1 input impedance 642120 f03 +in in + out C in C out + Cin 100 r t 66.5 0.1f 1000 ltc6421-20 100 r s 50 r s //r t 28.7 v in 1000 + C 0.1f output impedance match the ltc6421-20 can drive an adc directly without external output impedance matching. alternatively, the differential output impedance of 25 1 can be matched to a higher value impedance, e.g. 50 1 , by series resistors or an lc network. output common mode adjustment the output common mode voltage is set by the v ocm pin, which is a high impedance input. the output common mode voltage is capable of tracking v ocm in a range from 1v to 1.6v. the bandwidth of v ocm control is typically 15mhz, which is dominated by a low pass ? lter connected to the v ocm pin and is aimed to reduce common mode noise generation at the outputs. the internal common mode feedback loop has a C 3db bandwidth of 300mhz, allowing fast rejection of any common mode output voltage disturbance. the v ocm pin should be tied to a dc bias
ltc6421-20 10 642120fb voltage with a 0.1f bypass capacitor. when interfacing with a/d converters such as the ltc22xx families, the v ocm pin can be connected to the v cm pin of the adc. driving a/d converters the ltc6421-20 has been speci? cally designed to interface directly with high speed a/d converters. the back page of this data sheet shows the ltc6421-20 driving an ltc2285, which is a dual 14-bit, 125msps adc. the v ocm pins of the ltc6421-20 are connected to the v cm pins of the ltc2285, which provide a dc voltage level of 1.5v. both ics are powered from the same 3v supply voltage. the inputs to the ltc6421-20 can be con? gured in various ways, as described in the input impedance and matching section of this data sheet. the outputs of the ltc6421-20 may be connected directly to the analog inputs of an adc, or a simple lowpass or bandpass ? lter network may be inserted to reduce out-of-band noise. test circuits due to the fully-differential design of the ltc6421 and its usefulness in applications with differing characteristic speci? cations, two test circuits are used to generate the information in this data sheet. test circuit a is dc1299, a two-port demonstration circuit for the ltc6420/ltc6421 family. the schematic and silkscreen are shown in fig- ure 4. this circuit includes input and output transformers (baluns) for single-ended-to-differential conversion and impedance transformation, allowing direct hook-up to a 2-port network analyzer. there are also series resistors at the output to avoid loading the ampli? er directly with a 50 load. due to the input and output transformers, the C3db bandwidth is reduced from 1.3ghz to approximately 1.1ghz. test circuit b uses a 4-port network analyzer to measure s-parameters and gain/phase response. this removes the effects of the wideband baluns and associated circuitry, for a true picture of the >1ghz s-parameters and ac characteristics. applications information
ltc6421-20 11 642120fb applications information figure 4a. top silkscreen of dc1299 (test circuit a)
ltc6421-20 12 642120fb applications information 642020 f04b r7 opt r5 [2] r9 [2] c25 0.1f c22 0.1f c22 [1] ?? c21 [1] c22 0.1f +ina Cina r11 opt r10 [2] r12 [2] c34 0.1f c31 [1] c30 0.1f ?? c30 0.1f c22 [1] Cinb +inb c18 0.1f c19 0.1f v + c18 0.1f c19 0.1f v + v + r1 1.21k 1% r2 1k 1% v + r16 1.21k 1% r18 1k 1% c16 0.1f td4 v ocma td5 gnd td3 gnd td2 v + 2.85v to 3.5v c35 1000pf c32 1000pf c30 0.1f c34 [1] c17 [1] c28 0.1f td1 v ocmb r5 [1] r3 1.5k 1% v + v + r17 1.5k 1% c43 0.1f 1 2 3 5 4 12 12 t2 tcm4-19+ c39 0.1f +outa Couta c35 [1] c40 0.1f c32 0.1f c41 [1] r14 [1] c44 0.1f 1 2 3 5 4 12 12 t4 tcm4-19+ Coutb +outb +ina Cina v C v C Cinb +inb C outa v + a v C v C v + b C outb v + av ocma +outa enablea v + bv ocmb +outb enableb c42 0.1f c14 4.7f c15 1f v + version Ca Cb u1 ltc6420cudc-20 ltc6421cudc-20 r5, r9, r10, r13 none none t1, t3 tcm4-19+ tcm4-19+ notes: unless otherwise specified [1] do not stuff [2] r4 88.7 r5 88.7 r12 88.7 r15 88.7 en a jp1 dis en 3 4 5 6 2 116 15 14 13 12 11 21 7 8 9 10 20 19 18 17 1 2 3 v + en b jp2 dis en 1 2 3 j1 j2 j5 j7 j3 j4 j6 j8 1 2 3 5 4 1 2 3 5 4 12 12 12 12 12 [2] t2 [2] t1 u1 [2] ltc6421-20 figure 4b. demo circuit 1299 schematic (test circuit a)
ltc6421-20 13 642120fb typical applications test circuit b, 4-port measurements (only the signal-path connections are shown) 642120 f04b Couta +outa +ina 0.1f 0.1f port 1 (50 7 ) 1/2 agilent e5071c port 2 (50 7 ) + + C C Cina 200 7 r out 12.5 7 r f 1000 7 (b channel not shown) r g 100 7 r f 1000 7 r out 12.5 7 37.4 7 37.4 7 r g 100 7 + + C C 0.1f 0.1f port 3 (50 7 ) 1/2 agilent e5071c port 4 (50 7 ) parallel adc drivers to reduce wideband noise + C r5 49.9 3.3v 3.3v r3 10 r4 10 r7 49.9 r8 49.9 c6 2.2f v ocm r6 49.9 1/2 ltc6421-20 1/2 ltc6421-20 v in c5 12pf c2 12pf c3 12pf 642120 ta02 c1 0.1f c4 0.1f C3db filter bandwidth = 120mhz ltc2208 v cm
ltc6421-20 14 642120fb udc package 20-lead plastic qfn (3mm 4mm) (reference ltc dwg # 05-08-1742 rev ?) package description 3.00 0.10 1.50 ref 4.00 0.10 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 19 20 1 2 bottom viewexposed pad 2.50 ref 0.75 0.05 r = 0.115 typ pin 1 notch r = 0.20 or 0.25 s 45 chamfer 0.25 0.05 0.50 bsc 0.200 ref 0.00 C 0.05 (udc20) qfn 1106 rev ? recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 0.05 0.25 0.05 2.50 ref 3.10 0.05 4.50 0.05 1.50 ref 2.10 0.05 3.50 0.05 package outline r = 0.05 typ 1.65 0.10 2.65 0.10 1.65 0.05 2.65 0.05 0.50 bsc
ltc6421-20 15 642120fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number b 3/10 changes to applications changes to related parts 1 16 (revision history begins at rev b)
ltc6421-20 16 642120fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2008 lt 0310 rev b ? printed in usa related parts part number description comments high-speed differential ampli? ers/differential op amps lt ? 1993-2 800mhz differential ampli? er/adc driver a v = 2v/v, oip3 = 38dbm at 70mhz lt1993-4 900mhz differential ampli? er/adc driver a v = 4v/v, oip3 = 40dbm at 70mhz lt1993-10 700mhz differential ampli? er/adc driver a v = 10v/v, oip3 = 40dbm at 70mhz lt1994 low noise, low distortion differential op amp 16-bit snr and sfdr at 1mhz, rail-to-rail outputs lt5514 ultralow distortion if ampli? er/adc driver with digitally controlled gain oip3 = 47dbm at 100mhz, gain control range 10.5db to 33db lt5524 low distortion if ampli? er/adc driver with digitally controlled gain oip3 = 40dbm at 100mhz, gain control range 4.5db to 37db ltc6400-8/ ltc6400-14/ ltc6400-20/ ltc6400-26 low noise, low distortion, differential adc drivers a v = 8db/14db/20db/26db, single ampli? er per ic, high performance ltc6401-8/ ltc6401-14/ ltc6401-20/ ltc6401-26 low noise, low distortion, differential adc drivers a v = 8db/14db/20db/26db, single ampli? er per ic, low power lt6402-6 300mhz differential ampli? er/adc driver a v = 6db, distortion < C80dbc at 25mhz lt6402-12 300mhz differential ampli? er/adc driver a v = 12db, distortion < C80dbc at 25mhz lt6402-20 300mhz differential ampli? er/adc driver a v = 20db, distortion < C80dbc at 25mhz ltc6404-1 600mhz, low noise, ac precision, fully differential input/output ampli? er/driver a v = unity gain, e n = 1.5nv/hz, distortion < C90dbc at 10mhz ltc6404-2 900mhz, low noise, ac precision, fully differential input/output ampli? er/driver a v = 2v/v, e n = 1.5nv/hz, distortion < C95dbc at 10mhz ltc6404-4 1800mhz, low noise, ac precision, fully differential input/output ampli? er/driver a v = 4v/v, e n = 1.5nv/hz, distortion < C98dbc at 10mhz ltc6406 3ghz rail-to-rail input differential op amp 1.6nv/ hz noise, C72dbc distortion at 50mhz, 18ma lt6411 low power differential adc driver/dual selectable gain ampli? er 16ma supply current, imd3 = C83dbc at 70mhz, a v = 1, C1 or 2 typical application dual adc driver for wideband direct-conversion receivers + C 3v 3v r3 10 r4 10 1/2 ltc6421-20 c2 12pf v in 642120 ta03 c3 12pf c1 0.1f c4 0.1f 1/2 ltc2285 C3db filter bandwidth = 140mhz r1 40.2 r2 40.2 v cm

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